Myoungjun Kwak — Software Engineer

- Physical Design Engineer with hands-on experience in advanced node (2nm-5nm) high-performance CPU cores, SoC implementation and flow methodology automation - Proficient in RTL-to-GDSII flow, including synthesis, floorplanning, place & route, CTS, ECO, and signoff - Specialized in PPA optimization, achieving timing closure and power reduction for GHz-class core designs - Strong background in hierarchical design planning and multi-source CTS for robust QoR and design convergence [Skills] - Logic Synthesis, Floorplan, Hierarchical Design Planning, UPF Integration - Place & Route, CTS, ECO, Signoff - STA, DRC, LVS, RC Extraction, Crosstalk Analysis - Script Integration and Automation (Tcl, Python, Perl, Makefile, Shell) Tools: Fusion Compiler, IC Compiler II, PrimeTime, PrimePower, StarRC, ICV Process Nodes: 2nm, 3nm, 4nm, 5nm

Stackforce AI infers this person is a Physical Design Engineer specializing in advanced semiconductor technologies.

Location: Cork, Ireland

Experience: 6 yrs 3 mos