Artur Sargsyan — Software Engineer
I am an Application‑Specific Integrated Circuit (ASIC) Design Engineer with hands‑on experience building and optimizing complex ASIC and SoC designs. Over the past several years, I have worked extensively across the physical implementation flow, from RTL synthesis through place‑and‑route (PNR) and signoff verification. My focus has been on achieving performance, power, and timing closure for advanced technology nodes, while developing and refining robust design flows and optimizing EDA tool usage. I enjoy tackling complex design challenges, especially where tight constraints require thoughtful tradeoffs and innovative solutions to achieve efficient, scalable, and production‑ready designs. I bring a strong academic foundation in IC design (MSc, NPUA), combined with real‑world, industry‑level experience, enabling me to bridge theory and practical execution effectively. Key areas of expertise: ASIC & SoC Physical Design Synthesis, PNR, and Signoff Timing, Power, and Performance Optimization Advanced Technology Nodes Flow Development & Methodologies Always interested in challenging projects, technical discussions, and opportunities to build high‑quality silicon.
Stackforce AI infers this person is a highly skilled ASIC Design Engineer with expertise in physical design and optimization.
Location: Yerevan, Yerevan, Armenia
Experience: 5 yrs 8 mos
Skills
- Asic & Soc Physical Design
- Synthesis, Pnr, And Signoff
Career Highlights
- Expert in ASIC and SoC design optimization.
- Strong academic foundation in IC design.
- Proven ability to tackle complex design challenges.
Work Experience
Synopsys Inc
ASIC Physical Design Senior Engineer (2 yrs 5 mos)
ASIC Physical Design Engineer (2 yrs 2 mos)
Synopsys Armenia Educational Department
Intern (1 yr 1 mo)
Education
Master's degree at National Polytechnic University of Armenia
Bachelor's degree at Synopsys Armenia Educational Departament
Bachelor's degree at National Polytechnic University of Armenia