PRASHANTH M S — Software Engineer
Currently serving as a Senior Engineer in ASIC Digital Design at Synopsys Inc, leveraging expertise in Verilog, CDC, and shell scripting to contribute to digital design projects. The role builds on over three years of progressive experience within Synopsys in various engineering capacities. Graduated with a Bachelor of Engineering in Electrical and Electronics Engineering from B. M. S. College of Engineering. Motivated by a desire to engage in creative and challenging projects, with a focus on exploring innovative technologies and contributing to impactful engineering solutions.
Stackforce AI infers this person is a Digital Design Engineer specializing in ASIC technologies.
Location: Tumkur, Karnataka, India
Experience: 3 yrs 11 mos
Skills
- Verilog
- Cdc
Career Highlights
- Over three years of progressive experience in ASIC Digital Design.
- Expertise in Verilog and CDC for digital design projects.
- Motivated to explore innovative technologies in engineering.
Work Experience
Synopsys Inc
ASIC Digital Design, Senior Engineer (2 yrs 3 mos)
ASIC Digital Design Engineer II (1 mo)
ASIC Digital Design Engineer I (1 yr 4 mos)
Technical Intern (4 mos)
Indian Institute of Science (IISc)
Research Intern (11 mos)
Education
Bachelor of Engineering - BE at B. M. S. College of Engineering
