S

Saurabh Payghan

Software Engineer

Pune, Maharashtra, India3 yrs 1 mo experience

Key Highlights

  • Expert in Analog & Mixed Signal Verification.
  • Proficient in multiple programming languages including Python and C.
  • Strong foundation in Digital Circuit Design.
Stackforce AI infers this person is a Mixed Signal Verification Engineer with expertise in Analog Design.

Contact

LinkedIn

Skills

Core Skills

Analog & Mixed Signal VerificationDigital Circuit Design

Other Skills

LT_SPICEPython (Programming Language)C (Programming Language)Verilog HDLProteusMATLABKeil uVisionSimulink

Experience

3 yrs 1 mo
Total Experience
3 yrs 1 mo
Average Tenure
3 yrs 1 mo
Current Experience

Synopsys inc

Analog & Mixed Signal Verification Engineer

May 2023 – Present · 3 yrs 1 mo · Pune District, Maharashtra, India

LT_SPICEPython (Programming Language)Digital Circuit DesignC (Programming Language)Verilog HDLProteus+4

Education

COEP Technological University

Bachelor's degree

Aug 2018 – May 2022

Sharda Convent ,Buldhana

SSC

Jun 2015 – May 2016

Rajershi Shahu College, Buldana

HSC — Science

Aug 2016 – May 2018

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