Aryan Garg — Software Engineer
Working as a C++ developer and responsible for R&D of IBM’s timing closure tools for the past 2years. These tools are responsible for the timing analysis on world’s fastest microprocessor designs on 7/5nm technology nodes. Gained expertise in gate-level timing, transistor-level timing, timing closure, and fundamental ASIC design flow. Programming languages I'm experienced with are C, C++, Python and TCL. Graduation: I have completed my bachelor's in Electrical Engineering from Indian Institute of Technology Jodhpur (2023 batch).
Stackforce AI infers this person is a Semiconductor Engineer with expertise in timing analysis and software development.
Location: Bengaluru, Karnataka, India
Experience: 2 yrs 10 mos
Skills
- Static Timing Analysis
- C++
- Python
- Vhdl
Career Highlights
- Expert in Static Timing Analysis for high-performance microprocessors.
- Developed automation tools for efficient hardware design analysis.
- Strong foundation in Electrical Engineering from IIT Jodhpur.
Work Experience
NVIDIA
Software Engineer (6 mos)
IBM
EDA Software Engineer (Static Timing Analysis) (2 yrs 10 mos)
EDA Developer Intern (2 mos)
KDnuggets
Content Writer (2 mos)
Analytics Vidhya
Content Writer (1 yr 2 mos)
Education
Bachelor of Technology - BTech at Indian Institute of Technology Jodhpur
Higher Secondary Education at Minarva Senior Secondary Public School
Secondary Education at DAV Centenary Public School - India
