H

Hari Krishna Vinjamoori

Software Engineer

Bengaluru, Karnataka, India6 yrs 7 mos experience
Highly Stable

Key Highlights

  • Expertise in ASIC Digital IC Implementation across multiple technology nodes.
  • Proficient in Power Aware Physical Synthesis and Formal Verification.
  • Strong collaboration with Physical Implementation engineers for optimal design performance.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in ASIC implementation and physical verification.

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Skills

Core Skills

AsicPhysical DesignPhysical VerificationVlsi

Other Skills

SynthesisSTAPower Aware Physical SynthesisFormal VerificationScan InsertionATPG pattern generationConformal Low Power checkPreSTAQC checksGenusFusion CompilerCadenceCalibreInnovusCMOS

About

Extensive working experience in ASIC Digital IC Implementation (Synthesis, PV, PD, STA) in various cutting edge low technology nodes (2NME, 3NME, 5nm, 7nm, 12nm) with TSMC fabrication foundries for MediaTek SoCs. Good understanding about the entire flow of Digital IC Design flow. Currently working as back-end design implementation engineer in Camera Image System Processor ISP division at MediaTek Bengaluru. Responsible for UPF based Power Aware Physical Synthesis and Implementation (logical cell place/opt and Pre-CTS), Formal Verification, Scan Insertion, ATPG pattern generation and coverage analysis, Conformal Low Power check, PreSTA, QC checks for mobile Socs chipsets and chromebook processor. Co-worked with Physical Implementation engineer to get best predictable performance with lowest Power/Area/Timing. Provide optimal solution to fix congestion and critical timings in the design. Working as a Physical Verification Engineer in VLSI at Mirafra Technologies Trained in Canada Innovus -28nm and worked on 10nm technology in project Familiar with Qualcomm working tools like Innovus and Calibre tools worked on block level

Experience

6 yrs 7 mos
Total Experience
2 yrs 1 mo
Average Tenure
8 mos
Current Experience

Sintegra inc.

Asic implementation Engineer

Oct 2025Present · 8 mos · Bengaluru, Karnataka, India

Appex semiconductor pvt ltd

Synthesis and STA Engineer

May 2025Oct 2025 · 5 mos · Bengaluru, Karnataka, India

Mediatek

2 roles

Synthesis Engineer

Jan 2021Oct 2025 · 4 yrs 9 mos · Bengaluru, Karnataka, India

SynthesisSTAPower Aware Physical SynthesisFormal VerificationScan InsertionATPG pattern generation+5

Experience

Jan 2021May 2025 · 4 yrs 4 mos · Bengaluru, Karnataka, India

  • Working as Synthesis Engineer with tools Genus and Fusion Compiler
GenusFusion CompilerASICPhysical Design

Mirafra technologies

Physical Verification Engineer

Oct 2019Dec 2020 · 1 yr 2 mos · Bengaluru, Karnataka, India · On-site

  • tools used cadence tools Calibre and innovus
CadenceCalibreInnovusPhysical VerificationVLSI

Education

Sri Indu College Of Engineering & Technology

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jun 2013Apr 2017

Sri Indu Institution of Engineering and Technology

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jan 2013Jan 2017

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