Manogna Devineni

Software Engineer

Hyderabad, Telangana, India1 yr 7 mos experience

Key Highlights

  • Experienced in Physical Design at Meta.
  • Strong foundation in VLSI and hardware engineering.
  • Proficient in technical documentation and design rule checking.
Stackforce AI infers this person is a VLSI and Hardware Engineering professional with a focus on Physical Design.

Contact

LinkedIn

Skills

Core Skills

Technical Documentation

Other Skills

Design Rule Checking (DRC)TkStatic Timing AnalysisTiming ClosureFloor PlansRTL CodingFloorplanningDigital LogicLogic DesignLogic GatesPython (Programming Language)RTL DesignPhysical DesignC (Programming Language)Hardware Design

Experience

1 yr 7 mos
Total Experience
9 mos
Average Tenure
--
Current Experience

Meta

Physical Design Engineer

Dec 2025 – May 2026 · 5 mos · Bengaluru · Hybrid

Rivos inc.

Member of Technical Staff

Sep 2024 – Dec 2025 · 1 yr 3 mos · Bengaluru, Karnataka, India · On-site

Google

Hardware Engineering Intern

Feb 2024 – Jul 2024 · 5 mos · Bengaluru, Karnataka, India · Hybrid

Technical DocumentationDesign Rule Checking (DRC)

Education

Chaitanya Bharathi Institute Of Technology

Bachelor of Technology - BTech — Electronics and communication

Dec 2020 – Jul 2024

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