Parivesh Patidar — Software Engineer
Working as Senior Engineer in Hardware Emulation team. My areas of work are broadly Low Latency Digital design, Computer Architecture, Arithmetic Hardware Design, FPGA Implementation, RTL Design,Digital Signal Processor. Understanding the functional operation of hardware and exploiting its unique characteristics for circuits in various applications is what drives my work. Always been looking for opportunities to acquire experience and knowledge in various domains, expertise in Digital design. Excellent hardworking quality, team work and time management skills are the keys for my works.
Stackforce AI infers this person is a Hardware Emulation Engineer with expertise in Digital Design and FPGA technologies.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 10 mos
Career Highlights
- Expertise in Low Latency Digital Design and FPGA Implementation.
- Strong background in Digital Signal Processing and Computer Architecture.
- Proven teamwork and time management skills in engineering projects.
Work Experience
Qualcomm
Lead Engineer, Senior (2 yrs 6 mos)
Senior Engineer (2 yrs 4 mos)
Synopsys Inc
Applications Engineer II (3 yrs 4 mos)
Dolat Capital Market Private Ltd.
FPGA Developer (9 mos)
National Institute of Technology Kurukshetra
Research Scholar (11 mos)
Education
Master of Technology (M.Tech.) at National Institute of Technology Kurukshetra
Bachelor of Technology - BTech at UIET Kurukshetra University
at Kurukshetra University
