Pooja Nagle

Software Engineer

Mumbai, Maharashtra, India15 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced ASIC Engineer with a focus on processor verification.
  • Strong background in VLSI and FPGA development.
  • Proven ability to develop diagnostics for complex protocols.
Stackforce AI infers this person is a VLSI and ASIC specialist with a focus on hardware verification.

Contact

LinkedIn

Skills

Core Skills

AsicFpga

Other Skills

C++VHDLDigital Signal ProcessorsDiagnosticsPIF protocolMatlabElectronicsPerlMicrocontrollersSimulationsPythonPspiceCLinuxModelSim

Experience

15 yrs
Total Experience
5 yrs
Average Tenure
13 yrs 4 mos
Current Experience

Nvidia

ASIC Engineer

Feb 2013 – Present · 13 yrs 4 mos · Bangalore

  • Working on Denver Processor Verification
C++FPGAASICVHDLDigital Signal Processors

Netapp

MTS, QA

Aug 2012 – Jan 2013 · 5 mos

  • Storage Industry

Tensilica

Intern - VLSI Profile

May 2010 – Jun 2010 · 1 mo

  • Part of the verification group at Tensilica and developed diagnostics for PIF protocol
DiagnosticsPIF protocol

Hyoela comsci

Software developer

May 2009 – Jul 2009 · 2 mos

  • Summer Internship.
  • Developed a project named "toll free"

Student alumni relations cell (sarc)

Core Team Member

Feb 2009 – May 2010 · 1 yr 3 mos

  • Student Alumni Relations Cell (SARC)

Education

Indian Institute of Technology, Bombay

Dual Degree(Btech+Mtech)

Jan 2007 – Jan 2012

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