Rohit Goyal — Software Engineer
A resilient and focussed person with an optimistic attitude done Mtech-VLSI. Description: PNR implementation of a block. Role: • To perform PNR, STA, and PV closure for 1 block. • Analyzing and taking care of setup/hold balancing by upsizing, downsizing, buffer insertions and net improvement. • Taking care of IR, Signal and Power EM at block level and rolling in the ECO fixes. • Clearing shorts, opens and DRC’s. Skills: • HDL: - Verilog • Scripting language:- TCL,MATLAB • Tools: - Xillinx, TCAD, LTspice, Synopsys (Fusion Compiler) • Operating Systems: - Windows, Linux • Domain: - Physical Design, Physical Verification, Analog Design, Digital Design
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and Physical Design.
Location: Bengaluru, Karnataka, India
Experience: 3 yrs 4 mos
Skills
- Static Timing Analysis
- Physical Verification
- Physical Design
Career Highlights
- Expert in Physical Design and Static Timing Analysis.
- Proven track record in PNR implementation and closure.
- Strong background in VLSI with a focus on optimization.
Work Experience
Synopsys Inc
Senior Application Engineer (3 yrs)
AMD
Silicon Design Engineer (1 yr)
JK Lakshmipat University, Jaipur
Teacher Assistant at JK Lakshmipat University, Jaipur (4 mos)
Innovation Communications Systems Ltd. Hyderabad
Embedded Product Designing Intern at Innovation Communications Systems Ltd. Hyderabad (1 mo)
Education
Master of Technology - MTech at Thapar Institute of Engineering & Technology
Bachelor of Technology - BTech at JK Lakshmipat University, Jaipur
Bachelor of Technology (Non Degree Program) at Indian Institute of Technology Gandhinagar
