Rohit Narkhede — CEO
Total 18+ years of experience in ASIC design verification, emulation, validation and lab bring up. PROFESSIONAL SKILLS: Hardware Description Language: SystemVerilog, Verilog, VHDL EDA Expertise: Behavioral/RTL modeling, IP-Core Logic Verification EDA Tools: Cadence NCSim, VCS, Verilog-XL, ModelSim, Synplify-Pro, Xilinx Foundation Series, iManager. Emulation (Accelerator) Tools: Palladium-II Programming Languages: C, C++. Operating Systems: Unix (Solaris), Linux, Windows NT Scripting Languages: Shell Scripting, Perl Verification Suite Tools: DV (ATI) , Coverage Driven Verification Methodology (CDV) , UVM
Stackforce AI infers this person is a seasoned ASIC design verification expert with a strong focus on emulation and validation.
Location: Pune, Maharashtra, India
Experience: 18 yrs 10 mos
Career Highlights
- 18+ years in ASIC design verification and emulation.
- Expert in SystemVerilog, UVM, and VHDL.
- Leadership experience as Verification Director.
Work Experience
Pico2Femto ("P2F") Semiconductor
Verification Director (1 yr 8 mos)
Cientra
Verification Development Manager (1 yr)
TeckSchool
Sr. Design & Verification Consultant (3 yrs 2 mos)
SmartPlay Technologies
Sr. Verification Engg (1 yr)
Broadcom
Sr. Verification Engineer(Contractor) (7 mos)
BrainSupport Integration Technologies
Individual consultant (3 yrs 3 mos)
Teradyne
Offshore Team lead (Contractor) (1 yr 2 mos)
AMD
ASIC Design Verification and Emulation(Contractor) (3 yrs 1 mo)
eInfochips
Sr. ASIC Verification Engg (5 yrs)
Bit Mapper Integration Technologies
Design Engineer (3 yrs 4 mos)
Education
BE at Dr. D. Y. Patil Vidyapeeth
