Sachi Dwivedi ā Product Engineer
VLSI Engineer | Physical Design Engineer š¹ Experience: Siemens EDA intern skilled in 5nm/40nm PnR, timing closure, and TCL scripting š¹ Skills: Verilog, STA, PPA optimization, ASIC flow (Aprisa, Vivado, Synopsys tools) š¹ Interests: Low-power design, RISC-V architecture, advanced node implementation š¹ Projects: RISC-V processor, I2C protocol, 40nm leakage optimization, 5nm timing fixes
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and Physical Design.
Experience: 1 yr
Skills
- Physical Design Engineering
- Asic Design
Career Highlights
- Expertise in Physical Design Engineering and ASIC flow.
- Hands-on experience with advanced node technologies like 5nm.
- Strong background in low-power design and RISC-V architecture.
Work Experience
Bharat Electronics Limited
Member research scientist (1 yr)
Siemens EDA (Siemens Digital Industries Software)
Physical Design Engineer (11 mos)
Entwicklersx
Content Writer (1 mo)
Education
Masters in electronic instrumentation and embedded system at National Institute of Technology Warangal
Bachelor's degree at University of Allahabad
