Sai Srinivas — Software Engineer
module Sai Srinivas D.S (); // I possess the following skills output Verilog/Vhdl; output C-shell/Perl scripting; output Linting; output CDC-Analysis; output Formal Verification (LEC); output ECO's; output Synthesis; output STA; output power estimation/reduction; output RTL Integration; //Scripting Languages output Perl ; output C-shell; // Protocol Knowledge output AXI; // Amba Protocols output AHB; output HDPLC; //Power Line Communication output Ethernet-802.3; output MIPI-SPMI; endmodule
Stackforce AI infers this person is a VLSI design expert with strong ASIC and verification skills.
Location: Bengaluru, Karnataka, India
Experience: 14 yrs 7 mos
Skills
- Verilog
- Asic
Career Highlights
- Expert in Verilog and ASIC design.
- Strong background in formal verification and CDC analysis.
- Proficient in multiple scripting languages for automation.
Work Experience
Qualcomm
Staff Engineer (1 yr 5 mos)
Lead Engineer Sr. (6 yrs 4 mos)
Aricent
Senior Engineer (3 yrs 1 mo)
Synopsys Inc
CAE II (1 yr 9 mos)
Wipro
Project Engineer (VLSI-Designer) (3 yrs 5 mos)
Education
Bachelor's Degree at B. M. S. College of Engineering
Karnataka Pre-University at JAIN College
High School at Bishop Cotton Boys School
