Sanchar Acharya

Software Engineer

Hyderabad, Telangana, India15 yrs 11 mos experience
Highly Stable

Key Highlights

  • Expert in TCAD simulation and CMOS process integration.
  • Strong background in semiconductor device physics and nanofabrication.
  • Proven track record in flash memory technology development.
Stackforce AI infers this person is a Semiconductor Engineering expert with a focus on device modeling and process integration.

Contact

Skills

Core Skills

Device ModelingSemiconductor PhysicsCmos Process IntegrationFlash Memory ReliabilityNon-volatile Technology DevelopmentSolid State

Other Skills

Analytical SkillsB1500CMOSChemical Vapor Deposition (CVD)Computer-Aided Design (CAD)CryogenicsData AnalysisData analysisDry EtchingElectrical characterizationElectron Beam LithographyElectron MicroscopyElectrostatic effect investigationEngineeringFESEM

About

Semiconductor industry professional with PhD from IIT Bombay. Key areas of expertise are as following. * Synopsys TCAD 2D/3D simulation of logic/memory/power devices. TCAD deck calibration with bench measurements, SIMS, SEM, TEM, inline metrology and parametric data. * CMOS process integration with Power, Performance and Area (PPA) optimisation. Developing low-voltage (LV) and high-voltage (HV) MOSFET process flow. Novel integration scheme and process route implementation in Fab. * IV, CV characterisation of MOS device. Parasitics extraction. Scribe structure dsign and design-of-experiments (DoE). Familiarity with layout editors like Cadence Virtuoso. Working knowledge of the design-to-mask workflow (schematic, layout, GDSII, DRC). * Solid device physics background in VLSI/solid-state devices. MOSFETs, diodes, capacitors, resistors, interconnects. Work experience (including nanofabrication) with novel devices such as silicon nanowires and 2D transistors. * Strong ability to perform data-driven engineering analysis and finding solution-space. Strong documentation and interpersonal skills. Root cause analysis of fallouts in fab. Big data and statistical analysis using Hive SQL, SAS JMP. Yield analysis. * Non-volatile memory technology development. Process/trim optimisation of TLC/QLC NAND flash memory. Silicon validation and reliability qualification. * 3D simulation of large power device structures. Advanced simulation methods for meshing and convergence with reasonable TAT. Simulation of JTE, multiple floating rings, trench MOS, superjunction.

Experience

15 yrs 11 mos
Total Experience
3 yrs 2 mos
Average Tenure
2 yrs 10 mos
Current Experience

Synopsys inc

2 roles

Staff Engineer

Mar 2024Present · 2 yrs 3 mos · Hyderabad, Telangana, India

Device ModelingSemiconductor PhysicsModel DevelopmentSolid State

Applications Engineer Sr II

Aug 2023Mar 2024 · 7 mos · Hyderabad, Telangana, India

Device ModelingSemiconductor PhysicsSolid State

Micron technology

2 roles

Senior Engineer Device TCAD

Mar 2021Sep 2023 · 2 yrs 6 mos

  • Acting as a key part of CMOS process development, understanding impact of process changes before/after Si
  • Proven ability to calibrate TCAD decks to support development of future nodes with reasonable predictability
  • Experience in investigation of fab issues with plausible device physics based explanation as part of task forces
Device ModelingSemiconductor PhysicsCMOS process integrationTCADSolid State

Senior Engineer NVE-PE

Jun 2019Mar 2021 · 1 yr 9 mos

  • Used volume data driven approach for root cause analysis of shortfall to customer spec/reliability projections
  • Worked as a part of a team to give critical inputs to process and trim development
  • Developed tests to assess new firmware features/impact of firmware changes to yield
Flash memory reliabilitySemiconductor PhysicsNon-volatile technology developmentSolid State

Indian institute of technology, bombay

3 roles

Research Associate

Promoted

Feb 2019May 2019 · 3 mos · Mumbai Area, India

Semiconductor PhysicsSolid State

PHD Student

Jul 2012Feb 2019 · 6 yrs 7 mos · Mumbai Area, India

  • Bottom-up approach to the realization of Silicon nanowire devices
  • Implemented a novel method for VLS growth of silicon nanowires in a spherical cold wall cat-CVD chamber
  • Extensive experience in physical characterization such as SEM, TEM, EDX, etc
  • Fabricated devices for electrical characterization of silicon nanowires
  • Proposed a current conduction mechanism in these nanowires is Poole-Frenkel transport using TCAD simulation and experiment
  • Fabrication and characterization of CVD graphene side-gate transistor
  • Devised a methodology to calculate gate capacitance of a side-gate graphene transistor through simulation and experiment
  • Investigated the electrostatic effect of using a non-2D side gate by using TCAD simulation
  • Pioneered a method to quantitatively determined the mobility improvement by using a side-gate architecture
Semiconductor PhysicsSolid State

Metal Nano Crystals for Nanocrystal Flash Memory Technologies

Sep 2011Jul 2012 · 10 mos · Mumbai Area, India

  • Optimized metal thin film on silicon substrate using RF sputtering
  • Optimized the process of formation of eutectic metal nanoparticles through thermal annealing

Iit bombay nanofabrication facility

Editorial Board Member

Aug 2015May 2016 · 9 mos · Mumbai Area, India

  • Responsible for written content published on the website
  • Interviewed researchers about their publications and developed popular science content in the form of articles as part of PR team
  • Peer-reviewed articles written by editorial board members

Sophisticated analytical instrument facility (saif), iit bombay

FESEM Operator

Apr 2015Mar 2017 · 1 yr 11 mos · Mumbai Area, India

  • Jeol JSM 7600F FEGSEM

Jadavpur university, kolkata

Msc dissertation

Jan 2010Jul 2011 · 1 yr 6 mos

  • Preparation, Characterization and Probable Application in Electronics of Some Metal Oxide Nanoparticles
  • Synthesized zinc oxide and manganese dioxide through sol-gel method
  • Doped zinc oxide and manganese dioxide with transition metals
  • Characterized the materials using FTIR, XRD, UV-Vis spectroscopy and I-V

Education

Indian Institute of Technology, Bombay

Doctor of Philosophy - PhD — Electrical Engineering

Jan 2012Jan 2019

West Bengal State University, Kolkata

Master of Science - MSc — Electronics

Jan 2009Jan 2011

University of Calcutta

Bachelor of Science — Electronics

Jan 2006Jan 2009

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