Sandip Mahale

Software Engineer

India18 yrs 2 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Senior Staff Engineer with extensive ASIC and VLSI expertise.
Proficient in RTL Design and Functional Verification.
Strong background in Integrated Circuit Design and Debugging.

Stackforce AI infers this person is a VLSI and ASIC expert with a focus on semiconductor design.

Contact

Skills

Core Skills

AsicVlsi

Other Skills

VerilogVHDLSoCSystemVerilogCRTL DesignFPGAModelSimFunctional VerificationDebuggingXilinxIntegrated Circuit DesignSemiconductorsNCSimEDA

Experience

18 yrs 2 mos

Total Experience

3 yrs

Average Tenure

3 yrs 6 mos

Current Experience

Qualcomm

Senior Staff Engineer/Manager

Nov 2022 – Present · 3 yrs 6 mos · Bengaluru, Karnataka, India

ASICVLSIVerilogVHDLSoCSystemVerilog+15

Arm

Staff Engineer

Dec 2019 – Nov 2022 · 2 yrs 11 mos

Intel corporation

Component Design Engineer

Mar 2013 – Dec 2019 · 6 yrs 9 mos · Banglore/Pune

Open-silicon pune

ASIC Verification Engineer

Jul 2011 – Mar 2013 · 1 yr 8 mos

Wipro technologies

VLSI Engineer

Jun 2010 – Jul 2011 · 1 yr 1 mo · Pune Area, India

Einfochips

ASIC Engineer

Feb 2008 – May 2010 · 2 yrs 3 mos

Education

Walchand college of engineering Sangli Maharashtra

B.E. — Electronics

Jan 2002 – Jan 2006

CDAC ACTS Pune

PGDVLSI — VLSI Design

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