Sasi Pujitha Ravipati — Software Engineer
AMS Verification Engineer Passionate about Digital circuit design and VLSI development. Interested in exploring the reliability and performance of analog and digital systems.
Stackforce AI infers this person is a VLSI Engineer with expertise in verification methodologies and FPGA development.
Location: Chengalpattu, Tamil Nadu, India
Experience: 2 yrs 6 mos
Skills
- Universal Verification Methodology (uvm)
- Fpga
Career Highlights
- Expert in Universal Verification Methodology and FPGA emulation.
- Strong foundation in VLSI development and digital circuit design.
- Proficient in multiple programming languages including C and Python.
Work Experience
Synopsys Inc
Sr Engineer (1 yr 10 mos)
Intern (Technical Engineering) (4 mos)
Microchip Technology Inc.
AIS IC Design Intern (7 mos)
Mindgrove Technologies
VLSI Design Intern (2 mos)
Alumni Affairs IIITDM
Coordinator (8 mos)
Education
Dual Degree at Indian Institute of Information Technology Design & Manufacturing Kancheepuram
Intermediate at Sri Chaitanya College of Education
SSC at Sri Chaitanya School