Shiv Kumar Tirumali — Software Engineer
DV lead :: project management, top level verification , point of contact for verification environment issues. * Spl : Verilog, System Verilog, Perl, C/C++,UVM. * Verification infrastructure and automation. * Low-Power verification using cpf
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and VLSI technologies.
Location: Hyderabad, Telangana, India
Experience: 18 yrs 7 mos
Skills
- Asic
- Functional Verification
- Soc
Career Highlights
- Expert in ASIC and VLSI design.
- Proficient in Verilog and SystemVerilog.
- Lead in functional verification projects.
Work Experience
Broadcom Limited
Principal Engineer (8 yrs 7 mos)
Engineer, Sr Staff - IC Design (3 yrs 7 mos)
Engineer,Staff II - IC Design (5 yrs 4 mos)
Advanced Micro Devices
ASIC Design Engg (1 yr 1 mo)
Education
MS at VEDAIIT, JNTU
BE at CBIT, Osmania university
at Kendriya Vidyalaya
