Siddarth Goyal — Software Engineer
Experienced Design Verification Engineer with a specialization in Formal Verification methodologies. Skilled in property checking, assertion-based verification , and tools such as JasperGold and VC Formal. Proven ability to collaborate with RTL and DV teams to ensure functional correctness at the IP and SoC level. Passionate about leveraging AI and large language models (LLMs) to enhance EDA tools and methodologies. I research and develop applications of Transformer-based models, retrieval augmented generation (RAG), and other AI techniques to accelerate the hardware design and verification process. I stay up-to-date on the latest AI research from NVIDIA and the broader community, and enjoy applying state-of-the-art techniques to solve challenging problems in hardware design and verification. Always eager to connect with other researchers and engineers working at the intersection of AI and EDA.
Stackforce AI infers this person is a Design Verification Engineer with a strong focus on AI-enhanced EDA methodologies.
Location: Delhi, India
Experience: 5 yrs 9 mos
Skills
- Formal Verification
- Property Checking
- Data Analysis
- Process Improvement
- Machine Learning
Career Highlights
- Expert in Formal Verification methodologies.
- Developed AI applications to enhance EDA tools.
- Proven track record in data analysis and process improvement.
Work Experience
NVIDIA
ASIC Design Engineer (3 yrs 11 mos)
Apollo 24|7
Product Intern (4 mos)
Dhani
Software Developer (1 mo)
Jocata
Machine Learning Engineer (1 mo)
Couture.ai
Data Analyst (1 mo)
Rendezvous IITD
Event Executive (1 mo)
eDC IIT Delhi(Entrepreneurship Development Cell)
Administrative Executive (1 yr 10 mos)
IIT Delhi Alumni Association & International Programmes
International Affairs Executive (11 mos)
Education
Bachelor of Technology - BTech at Indian Institute of Technology Delhi