someshwar chilukamari

Software Engineer

Hyderabad, Telangana, India5 yrs 8 mos experience

Key Highlights

Experienced ASIC Physical Design Engineer at AMD.
Proficient in Place & Route and ECO methodologies.
Strong background in Synopsys and Cadence tools.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC physical design.

Contact

Skills

Core Skills

Place & RouteEco

Other Skills

Synopsys FormalityIcc2Synopsys toolsSynopsys PrimetimeIremVsiCadence EncounterDesign Rule Checking (DRC)

Experience

5 yrs 8 mos

Total Experience

2 yrs 11 mos

Average Tenure

2 yrs 11 mos

Current Experience

Amd

ASIC Physical Design Engineer

Jul 2023 – Present · 2 yrs 10 mos · Hyderabad, Telangana, India · On-site

Place & Route

Soctronics

ASIC Physical Design Engineer

Oct 2020 – Sep 2023 · 2 yrs 11 mos · Hyderabad, Telangana, India

ECOSynopsys Formality

Education

BRILLIANT COLLEGE OF EDUCATION

Bachelor of Technology - BTech

Jan 2016 – Jan 2019

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