Suresh Mani Gounder

CTO

Bengaluru, Karnataka, India24 yrs 11 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

23+ years in software development and compiler design.
Expertise in LLVM and high-level synthesis.
Proven leadership in optimizing compiler backends.

Stackforce AI infers this person is a Compiler Optimization Expert in the Software Development industry.

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Skills

Core Skills

Compiler OptimizationCompiler DesignHigh Level Synthesis

Other Skills

LLVM Compiler OptimizationsStructure PeelingPointer CompressionCtoS OptimizationDFG and CFGCSEConstant PropagationLoop UnrollingCompiler BackendFault ToleranceCross CompilersInstall ShieldMS VC++Flash File SystemsLiveness Analysis

About

Have around 23+ years of work experience in software development. Most of my experience is in compiler design, compiler backend & optimization modules, LLVM and 2.6 years experience in High level synthesis. Solid background in C/C++ and Systems Programming, exposure to various DSP Processor Architectures and Assembly Programming. Ability to switch to various software modules or project as per team requirements and take up leadership of various activities in the project.

Experience

24 yrs 11 mos

Total Experience

5 yrs

Average Tenure

11 yrs 8 mos

Current Experience

Amd

3 roles

Principle Member of Technical Staff

Promoted

Jul 2024 – Present · 1 yr 10 mos

Senior Member Of Technical Staff

Promoted

Jul 2017 – Present · 8 yrs 10 mos

Member Of Technical Staff

Sep 2014 – Present · 11 yrs 8 mos

Working on LLVM Compiler Optimizations.
Expertise in Structure Peeling and Pointer Compressions in LLVM.

LLVM Compiler OptimizationsStructure PeelingPointer CompressionCompiler OptimizationCompiler Design

Cadence design systems

Member of Consulting Staff

May 2011 – Mar 2014 · 2 yrs 10 mos · Bangalore

CtoS is a high-level synthesis tool, given a System C specification of a circuit
or design and constraints (such as clock period, type of data path elements and no of clock cycles) this tool converts the C spec to RTL code. I was part of the CtoS optimization team and handled DFG and CFG aspects of the intermediate code or circuit and further handled CSE, Constant Propagation, and Loop Unrolling algorithms. Was involved in implementing a feature called 'split_array'.

High Level SynthesisCtoS OptimizationDFG and CFGCSEConstant PropagationLoop Unrolling+1

Hewlett-packard

Senior Software Engineer (Specialist)

Jan 2003 – Apr 2011 · 8 yrs 3 mos · Banglaore

Responsible for enhancement and maintenence of HP Non Stop compilers. Non Stop platform is known for fault tolerance, providing high availability and scalability.
The family of products handled here,
1. Compiler back end for platforms TNS & MIPS
2. Compiler front ends for pTAL & Cobol
3. Run-time libraries of Cobol.
4. Occasionally was even involved in QA for compilers.
5. Maintained installers for the Cross Compilers on windows using Install shield.
6. Implementation of home grown Installers using MS VC++.

Compiler BackendFault ToleranceCross CompilersInstall ShieldMS VC++Compiler Design+1

Logipro software pvt.ltd.

Software Engineer

Aug 2002 – Nov 2002 · 3 mos · Bangalore

Design and development of Flash File Systems.

Flash File Systems

Digital and analog computing systems.

Software Engineer

Aug 2000 – Jul 2002 · 1 yr 11 mos · Bangalore

Design and development of following modules in compiler backend (Right from scratch),
1. Liveness Analysis and Register allocation using Chaitins Algorithm.
2. ABI compliant code generation
3. Data flow analysis (Liveness Analysis, Reaching Definitions, and Available expressions).
4. Copy propagation or Coalescing in Chaitins Algorithm.
5. Static Single Assignment (SSA) format or register renaming.
6. Dead code elimination.
7. Constant Propagation.
8. Scheduler and register allocation interaction for a better register allocation.
9. Identifying Loops, Loop Invariants and performing Code motion.
10. Loop Unrolling.
11. Control flow analysis.
12. Simple list scheduling algorithms and dependency graphs.