Deepthi U

Software Engineer

Bengaluru, Karnataka, India7 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in Verilog-AMS and UVM methodologies.
  • Proficient in multiple verification tools and languages.
  • Strong foundation in design verification engineering.
Stackforce AI infers this person is a Design Verification Engineer specializing in semiconductor verification technologies.

Contact

deepthi.u@ti.comLinkedIn

Skills

Core Skills

Verilog-amsUvm

Other Skills

Cadence VirtuosoCadence skill codeDesign Rule Checking (DRC)Layout Versus Schematic (LVS)Logic equivalence checkingNCSimPython (Programming Language)QuestaSimSoft SkillsSystem verilog real number modelingSystemVerilogVerilogco-simulationVerilog ams

About

Experienced Designe verification engineer

Experience

7 yrs 8 mos
Total Experience
2 yrs 6 mos
Average Tenure
4 yrs
Current Experience

Texas instruments

Design Verification Engineer

May 2022 – Present · 4 yrs

Verilog amsUVMCadence skill codePython (Programming Language)Verilog-AMSSystemVerilog+8

Sankalp semiconductor

AMS Verification Engineer

May 2021 – Apr 2022 · 11 mos · Bengaluru, Karnataka, India

Karmic design private ltd

Junior Engineer

Jul 2018 – Apr 2021 · 2 yrs 9 mos · Manipal

Education

canara engineerng college,benjanapadavu

Jan 2014 – Jan 2018

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