Vipul Rajput

CTO

Bengaluru, Karnataka, India17 yrs 11 mos experience

Highly Stable

Key Highlights

Expert in functional verification and ASIC design.
Proven track record in semiconductor industry.
Strong skills in System Verilog and UVM methodologies.

Stackforce AI infers this person is a semiconductor verification expert with extensive experience in ASIC and IP functional verification.

Contact

Skills

Core Skills

Functional VerificationTest PlanningAsic Design

Other Skills

Code CoverageAXISystemVerilogASICVerilogVLSIEDAUVMVHDLDebuggingOVMFPGAC++COpen Verification Methodology

About

Experienced Verification Lead with a demonstrated history of working in the semiconductors industry. Skilled in Debugging,SOC, IP Functional Verification,System Verilog, UVM/OVM, Verilog, and VHDL. Strong engineering professional with a PGDIT from Symbiosis International University.

Experience

17 yrs 11 mos

Total Experience

3 yrs 1 mo

Average Tenure

2 yrs 2 mos

Current Experience

Amd

2 roles

Senior Member of Technical Staff

Promoted

Feb 2024 – Present · 2 yrs 2 mos · Bengaluru, Karnataka, India · On-site

Sr. DV Engineer

Feb 2016 – Oct 2018 · 2 yrs 8 mos · Bengaluru, Karnataka, India

IP Verification
Functional Verification,
AMS co-simulation

Code CoverageTest PlanningFunctional Verification

Intel corporation

Verification Lead

Oct 2018 – Feb 2024 · 5 yrs 4 mos · Greater Bengaluru Area

Security and Fuse Functional verification at SOC, Subsystem, IP level.

Code CoverageFunctional VerificationTest Planning

Smartplay technologies

Sr. Engineer (Verification)

Jun 2012 – Jan 2016 · 3 yrs 7 mos · Bengaluru, Karnataka, India

IP Verification

Code CoverageTest PlanningFunctional Verification

Hcl technologies

Lead Engineer

Apr 2010 – Jun 2012 · 2 yrs 2 mos · Noida, Uttar Pradesh, India

ASIC Design and Verification using VHDL, VerilogHDL and System Verilog (Open Verification Methodology). FPGA Design and Validation

Code CoverageTest PlanningASIC DesignFunctional Verification

Trident techlabs pvt. ltd. delhi

Application Engineer-EDA

Oct 2007 – Oct 2009 · 2 yrs · Greater Delhi Area

Responsible for Seminar, Workshop and Training on EDA Tools.

Education

SYMBIOSIS INTERNATIONAL UNIVERSITY

PGDIT — Information Technology

Jan 2008 – Jan 2011

Semiconductor Complex Ltd VEDANT Chandigarh

PG Diploma VLSI Design — VLSI Design

Jan 2005 – Jan 2006

Motivational Pathway

B.Tech — Electronics & Communication

Jan 2001 – Jan 2005

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