Mayank Jain

Software Engineer

Bengaluru, Karnataka, India3 yrs 9 mos experience

Key Highlights

  • Experienced in Analog and Mixed Signal IPs development.
  • Strong foundation in VLSI from National Institute of Technology.
  • Proficient in industry-standard tools like Cadence Virtuoso.
Stackforce AI infers this person is a VLSI Design Engineer with a focus on Analog and Mixed Signal technologies.

Contact

LinkedIn

Skills

Other Skills

Cadence VirtuosoMonte CarloSynopsys vcsVerilog-AMS

Experience

Arm

Design Engineer

Feb 2025 – Present · 1 yr 1 mo · Bengaluru, Karnataka, India · Hybrid

Intel corporation

2 roles

Memory Design Engineer

Jul 2023 – Feb 2025 · 1 yr 7 mos · Bengaluru, Karnataka, India

Graduate design intern

Jul 2022 – Jul 2023 · 1 yr · Bengaluru, Karnataka, India

  • Working on Analog and Mixed Signal IPs.

Education

National Institute of Technology, Goa

Masters of Technology- M.Tech. — VLSI

Sep 2021 – Sep 2023

Devi Ahilya Vishwavidyalaya

Jan 2017 – Jan 2021

Stackforce found 100+ more professionals with Cadence Virtuoso & Monte Carlo

Explore similar profiles based on matching skills and experience

Suvrat Tedia

Suvrat Tedia

Product Development Engineer

at Sandisk

San Jose, United States9 yrs 5 mos exp
Data AnalysisEmbedded SystemsFPGA DevelopmentReliability EngineeringStatistical Analysis
SJ

Shreyas Jinadatta

Analog Design Engineer

at Texas Instruments

Chandler, United States8 yrs 4 mos exp
Analog Circuit DesignAnalog ValidationIntegrated Circuit DesignPhysical DesignPower Management IC
Pratyush Dwivedi

Pratyush Dwivedi

Graphics Verification Engineer

at Apple

Cupertino, United States8 yrs 5 mos exp
SoC DesignVerification
Prashant Kumar

Prashant Kumar

Staff Engineer

at STMicroelectronics

Noida, India11 yrs 11 mos exp
Analog Circuit DesignCircuit Design
Prof. Mayank Shrivastava

Prof. Mayank Shrivastava

Full Professor

at Indian Institute of Science (IISc)

Bengaluru, India19 yrs 3 mos exp
Deep Saxena

Deep Saxena

Analog Design Engineer

at Renesas Electronics

Bengaluru, India16 yrs 10 mos exp
Analog Circuit DesignPower Management
Abhilash M

Abhilash M

Verification Engineer

at Siliconsemislice

Bengaluru, India2 yrs 4 mos exp
SystemVerilogUniversal Verification Methodology (UVM)
Abhishek Agarwal

Abhishek Agarwal

Senior RF/MS IC Design Engineer

at MaxLinear

San Diego, United States6 yrs 4 mos exp
Analog IC DesignRF Design