Ishu Shukla

Software Engineer

Noida, Uttar Pradesh, India5 yrs 2 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expertise in physical design engineering.
  • Proficient in EDA tools like Innovus and Fusion Compiler.
  • Strong background in static timing analysis and physical verification.
Stackforce AI infers this person is a Physical Design Engineer with expertise in EDA tools and physical verification.

Contact

LinkedIn

Skills

Other Skills

Assembly LanguageC (Programming Language)Digital ElectronicsEMIRFloorplanningPNRPhysical VerificationStatic Timing AnalysisTCLcentos linux

About

Physical design engineer, expertise spans across various aspects of physical design, including: Synthesis, Floorplan, Placement, CTS, Routing, and signoff checks (STA, DRC, LVS, EM, IR drop analysis) EDA Tools: Innovus, Fusion Compiler, ICC2, StarRC, XOR, PT, ICV, ICVW, Calibre, Formality, RedHawk.

Experience

Einfochips (an arrow company)

2 roles

Senior Physical Design Engineer

Promoted

Oct 2024 – Present · 1 yr 5 mos

ASIC Physical Design Engineer

Jul 2021 – Oct 2024 · 3 yrs 3 mos

Eitra - einfochips training & research academy ltd

Trainee engineer

Jan 2021 – Jul 2021 · 6 mos

Education

Vishwakarma Government Engineering College

Bachelor of Engineering - BE — ECE

Jan 2017 – Jan 2020

vgec

Stackforce found 100+ more professionals with Assembly Language & C (Programming Language)

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