Varun Tej — Software Engineer
I am Varun Tej, currently working as ASIC Engineer in Physical Design team at NVIDIA. I hold a masters degree in VLSI from IIT Gandhinagar. I have completed courses on Digital CMOS design, Physics of Transistors and Microfabrication process. I have worked on Verilog, Cadence Virtuoso and Sentaurus TCAD.
Stackforce AI infers this person is a VLSI ASIC Engineer with expertise in physical design and semiconductor technologies.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 7 mos
Career Highlights
- Expert in VLSI design and physical design methodologies.
- Proficient in Verilog and Cadence tools for ASIC design.
- Strong academic background with a Master's from IIT Gandhinagar.
Work Experience
NVIDIA
Senior ASIC Design Engineer (1 yr 11 mos)
ASIC Design Engineer (2 yrs 7 mos)
Indian Institute of Technology Gandhinagar
Graduate Teaching Assistant (7 mos)
Intel Corporation
Graduate Technical Intern (5 mos)
Indian Institute of Technology Gandhinagar
Graduate Teaching Assistant (4 mos)
Graduate Teaching Assistant (4 mos)
Graduate Teaching Assistant (4 mos)
Mercedes-Benz Research and Development India
Software Development Engineer (1 yr 5 mos)
Graduate Engineering Trainee (5 mos)
Chegg India
Subject Matter Expert (8 yrs 5 mos)
Education
Master of Technology - MTech at Indian Institute of Technology Gandhinagar
Bachelor of Engineering - BE at RV College Of Engineering
