S

Sharmila S.

Software Engineer

Bengaluru, Karnataka, India10 mos experience

Key Highlights

  • Senior Engineer with expertise in VLSI Design.
  • Proficient in Static Timing Analysis and related tools.
  • Strong foundation in programming languages and software development.
Stackforce AI infers this person is a VLSI Design Engineer with strong software development skills.

Contact

LinkedIn

Skills

Core Skills

Static Timing Analysis

Other Skills

CMOSXilinx VivadoCadence VirtuosoMATLABC++Python (Programming Language)JavaC (Programming Language)HTMLCascading Style Sheets (CSS)

Experience

10 mos
Total Experience
10 mos
Average Tenure
10 mos
Current Experience

Mediatek

2 roles

Senior Design Engineer

Jul 2025 – Present · 10 mos · On-site

Static Timing Analysis

SoC Design Intern

Jul 2024 – Jun 2025 · 11 mos · On-site

Bolt iot

Web Development Trainee

May 2020 – Jul 2020 · 2 mos

Aspirevision tech education private limited

Summer Trainee

Jun 2019 – Jun 2019 · 0 mo · Bengaluru, Karnataka, India · On-site

Education

VIT-AP University

Master of Technology - MTech — VLSI Design

Sep 2023 – Sep 2025

Sikkim Manipal Institute of Technology

Bachelor of Technology - BTech — Electronics and Communication Engineering

Jul 2017 – Jun 2021

Abhayeswari HS & MP School

12th — Science

Little Flower English High School - India

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