Nihal Jain

Engineering Manager

Bengaluru, Karnataka, India9 yrs 3 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in Mixed Signal Layout and SRAM memory design.
Hands-on experience with Cadence Virtuoso and Mentor Graphics tools.
Proven track record in physical verification and ASIC design.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and mixed signal layout.

Contact

Skills

Core Skills

Analog Circuit DesignVlsi

Other Skills

Laker layout editorCadence Virtuoso layout editorCadence VirtuosoCMOSEDAVirtuosoPhysical DesignASICStatic Timing AnalysisDRCLVSFloorplanningDigital ElectronicsIntegrated Circuit DesignSRAM

About

Have experiencce in the field of Mixed signal layout. worked on leaf cells of SRAM memory layout using 28nm node of jazz semiconductors Hands on experience in Mentor Graphics - Pyxis Layout, Calibre Cadence Virtuoso layout editor

Experience

9 yrs 3 mos

Total Experience

2 yrs 3 mos

Average Tenure

5 yrs 9 mos

Current Experience

Intel corporation

Engineering Manager

Jan 2024 – Present · 2 yrs 3 mos · Bengaluru, Karnataka, India

Intel corporation

2 roles

Senior SOC Design Engineer

Mar 2018 – Mar 2020 · 2 yrs

Soc design engineer

Sep 2016 – Mar 2020 · 3 yrs 6 mos

My role mainly includes physical verification and block execution activities

Lsi, an avago technologies company

ASIC Design Engineer

May 2014 – Sep 2016 · 2 yrs 4 mos · bangalore

My responsibilities includes physically verifying all the blocks before sign off.I do sign off checks required for manufacturing as mentioned by the foundry

Lsi india research & development pvt.ltd

ASIC DvDs Engineer 1

Sep 2013 – May 2014 · 8 mos · Bangalore

Rv vlsi design center

Advance diploma in ASIC design

Jan 2013 – Jul 2013 · 6 mos · Bangalore

Cosmic circuits

Trainee-Analog layout design engineer

Jul 2012 – Nov 2012 · 4 mos · Bangalore

As a trainee in Cosmic Circuits,i have worked on layouts such as standard cells,Flip flops,encoders & bandgap circuits.I have a hands on experience of working in 65nm & 45nm node technologies of TSMC foundries.I have hands on experience in using tools such as Laker layout editor by springsoft & Cadence Virtuoso layout editor

Laker layout editorCadence Virtuoso layout editorAnalog Circuit DesignVLSI