Ravi Mangal — CTO
Engineering leader with strong exposure to IP and SoC verification methodologies. - Taped out multiple SoCs from scratch - Driven verification teams to reach different milestones in the overall verification life cycle. - Involved in chip verification planning, simulation bring up, testbench infrastructure updates and coverage based sign off for multiple SoCs - Hired, mentored and trained many DV Engineers - Focus on innovation, automation and developing new methodologies in order to reuse the flows across multiple IPs in SoC - Love to contribute to the industry by sharing best practices through participation in various DV conferences Skills: Verilog, System Verilog, UVM, Tcl, Python, RTL Verification
Stackforce AI infers this person is a Semiconductor Verification Expert with a focus on SoC and IP methodologies.
Location: Bengaluru, Karnataka, India
Experience: 11 yrs 2 mos
Career Highlights
- Led multiple SoC verification projects from scratch.
- Expert in automation and innovative verification methodologies.
- Mentored and trained numerous design verification engineers.
Work Experience
TPU DV Lead (1 yr)
Silicon Design Verification Manager (2 yrs)
Senior Design Verification Engineer (2 mos)
Micron Technology
Manager, ASIC Design Verification (1 yr 4 mos)
Senior Engineer, SoC Design Verification (1 yr 6 mos)
Intel Corporation
Core Verification Lead (1 yr 3 mos)
Cadence Design Systems
Lead Application Engineer - Verification Solutions (11 mos)
Senior Application Engineer - Verification Solutions (1 yr 4 mos)
Freescale Semiconductor
Digital IP Verification Engineer (1 yr 9 mos)
Bosch India
Intern (2 mos)
Education
B.Tech at Indian Institute of Technology, Roorkee