Dipesh Makwana — Software Engineer
With a solid foundation in Electronics and Communications from Nirma University, my journey has advanced to a pivotal role at eInfochips, where I drive innovation in SoC Formal Verification. My expertise in RTL Coding and SystemVerilog has been instrumental in optimizing design processes, contributing to our team's success in delivering cutting-edge solutions. Passionate about the convergence of technology and creativity, I strive to leverage my skills in C++ to further enhance our verification methodologies. My aim is to continually push the boundaries within the sphere of technology, ensuring that my contributions not only meet but exceed the strategic goals of eInfochips.
Stackforce AI infers this person is a skilled engineer in the semiconductor industry with a focus on verification methodologies.
Location: Ahmedabad, Gujarat, India
Experience: 7 yrs 7 mos
Skills
- Functional Verification
- Rtl Coding
- Soc Formal
- Full Stack Development
Career Highlights
- Expert in SoC Formal Verification and RTL Coding.
- Proficient in C++ for enhancing verification methodologies.
- Strong foundation in Electronics and Communications Engineering.
Work Experience
eInfochips (An Arrow Company)
Senior Design Verification Engineer (2 yrs 9 mos)
Engineer (4 yrs)
eiTRA - eInfochips Training & Research Academy Ltd
Trainee (5 mos)
Brain TecLabs
Full Stack Developer (6 mos)
Education
Bachelor of Technology - BTech at Nirma University, Ahmedabad