pawan gupta — Product Engineer
1. Build UVM Bsed VIP for MRepair IP at ST Microelectronics. 2. Successfully Designed and implemented CCI model inside CSI-2 Protocol. 3. Design of D-PHY in High Speed mode succesfully implemented. Specialties: Designing , Coverage Driven Verification of design
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in design and verification methodologies.
Location: Delhi, India
Experience: 14 yrs 6 mos
Skills
- System Verification
- Designing
- Functional Verification
Career Highlights
- Expert in designing high-speed D-PHY protocols.
- Proficient in coverage-driven verification methodologies.
- Strong background in UVM and SystemVerilog.
Work Experience
Renesas Electronics
Principal Engineer (1 yr)
Qualcomm
Staff Engineer (3 yrs 7 mos)
Mentor Graphics
Consulting Member Of Technical Staff (3 yrs)
Lead Member Of Technical Staff (1 yr 11 mos)
Senior Member Of Technical Staff (3 yrs 11 mos)
Member Technical Staff (1 yr)
Masamb Electronics Systems
Design Engineer (1 yr)
Mentor Graphics
Trainee (1 mo)
Education
B.TECH at Guru Gobind Singh Indraprastha University
CLASS - XII at D.L.D.A.V. MODEL SCHOOL,PITAMPURA