S

Sudhir Kumar (Aggarwal)

VP of Engineering

India21 yrs 6 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 20+ years in Embedded Memory Design.
  • Expert in SRAM and Register Files memory design.
  • Currently managing a memory design team at Synopsys.
Stackforce AI infers this person is a leader in the Semiconductors industry with a focus on memory design.

Contact

LinkedIn

Skills

Other Skills

CMOSCircuit DesignEDAFunctional VerificationMemory DesignMicroelectronicsSemiconductorsVerilog

About

Experience of 20+ Years in the field of "Embedded Memory Design" which involves designing & characterization of Single/Dual port SRAM and Register Files memories on different technology process & node. Currently, managing a memory design/development team at Synopsys.

Experience

Synopsys inc

6 roles

Senior Director R&D

Promoted

Feb 2024 – Present · 2 yrs 1 mo

Director R&D

Promoted

Feb 2023 – Jan 2024 · 11 mos

Senior Manager

Promoted

Jun 2018 – Jan 2023 · 4 yrs 7 mos

R & D Manager II

Jun 2015 – May 2018 · 2 yrs 11 mos

R&D Manager I

Promoted

Jun 2012 – May 2015 · 2 yrs 11 mos

Sr. R&D Engineer II

Sep 2010 – May 2012 · 1 yr 8 mos

  • Memory Designing
  • Virage Logic was acquired by Synopsys in 2010

Virage logic

3 roles

Project Leader

Apr 2008 – Sep 2010 · 2 yrs 5 mos · Noida, Uttar Pradesh, India

  • Memory Designing

Sr. Design Engineer

Promoted

Apr 2006 – Mar 2008 · 1 yr 11 mos · Noida, Uttar Pradesh, India

  • Memory Designing

Design Engineer

Sep 2004 – Mar 2006 · 1 yr 6 mos · Noida, Uttar Pradesh, India

Infineon technologies, munich, germany

Design Engineer

Jan 2004 – Aug 2004 · 7 mos · Greater Munich Metropolitan Area

  • Design Engineer

Education

Hamburg University of Technology

M.S. — MicroElectronics & Microsystems

Jan 2001 – Jan 2003

Delhi College of Engineering

B.E — Electrical

Jan 1997 – Jan 2001

Stackforce found 100+ more professionals with CMOS & Circuit Design

Explore similar profiles based on matching skills and experience

Ashutosh Agrawal

Ashutosh Agrawal

Senior Software Engineer

at Google

Bengaluru, India13 yrs 5 mos exp
Soumit Biswas

Soumit Biswas

Sr. Verification Engineer

at NVIDIA

Bengaluru, India13 yrs 8 mos exp
Formal Verification
AR

Aman Rastogi

R & D Engineer

at LOGIC-FRUIT TECHNOLOGIES PVT LTD

Greater Delhi, India11 yrs 9 mos exp
DFMIR Drop AnalysisLeafcell DevelopmentMemory Compiler DevelopmentPCIe
MD MANZER QUASMI

MD MANZER QUASMI

Public Speaker

at Owner MCIR

Hyderabad, India15 yrs 8 mos exp
Public SpeakingDigital ElectronicsFPGA
Diljith Maviladeth

Diljith Maviladeth

Co-Founder, CTO

at Avench Systems

Bengaluru, India21 yrs 9 mos exp
Embedded SystemsProject Management
UK

Ujjwal Kant

ASIC Emulation Engineer

at Intel Corporation

Austin, United States11 yrs 9 mos exp
VR

Vijaya R.

SoC Design Engineer

at Intel Tech. India Private Limited,Bangalore

Bengaluru, India16 yrs 9 mos exp
ASIC DesignDesign EngineeringIC DesignMixed Signal DesignPDN Analysis
Aaisha Siddiqa

Aaisha Siddiqa

Staff Sr Hardware Design Engineer

at Schneider Electric

Bangalore, India12 yrs 11 mos exp