RAGHAVENDRA B NAGASHRITH — Product Engineer

9 years of experience in VLSI Layout Design and Passionate towards layout design. As an engineer to make the best use of my skills, knowledge and contribute effectively to the organisation Skills- 1.Layout design(Standard cells) experience in various technologies - 180nm,90nm,45nm,28nm,FinFet(16nm,4nm,5nm,3nm,2nm) 2. Worked on different Standard cell libraries of different architectures in various technologies of Samsung, TSMC, Intel foundries 3. Worked on Standard cell Architecture analysis 4. Basic concepts of Analog layout 5..Verification checks such as DRC,LVS,ERC,DFM 6..Cadence SKILL scripting, Calibre SVRF coding 7 .Handling of Physical views generation of LEF, MILKYWAY, NDM 8. Handled different libraries in multiple technologies. 9. Layout PPA optimisation for various technologies Scripting- 1. Cadence SKILL 2. Calibre SVRF EDA Tools- 1. Cadence Virtuoso 2. Calibre 3. Abstract 4. ICV 5. Calibredrv Interests- 1. Layout Design(Analog and Digital) 2. VLSI Physical design.. 3 . Scripting

Stackforce AI infers this person is a VLSI Layout Design expert with a focus on semiconductor technologies.

Location: Bengaluru, Karnataka, India

Experience: 11 yrs