Biswajit Patra — CTO
Passionate about architecting and designing cutting-edge AI High-Performance Computing (HPC) platforms, silicon technologies & design methodology development, 2.5D/3D advanced packaging, and chiplet-based product designs. Deep expertise in optimising power-performance, networking throughput, power delivery, and thermal solutions, with a strong focus on total cost of ownership (TCO) and time to market. Expertise in providing technical leadership for the successful implementation and signoff of over 100 commercially successful SOC Physical designs, for Intel and Qualcomm in segments such as smartphones, laptops, desktops, automotive, AI/ML hardware accelerators, ultralow power devices, and HPC. Demonstrated collaborative technical leadership in pioneering chiplet/foveros/3DIC-based complex SOC design, from scratch to post-silicon validation and characterization. Led the implementation of industry-first SOCs with up to 47 chiplets, employing 3DIC-based design methodologies and ensuring first-time silicon success. Technologist in SOC-Package co-optimization, integrating high-speed IPs (DDRs, Dekel, Xeon core, Atom, Arm cores), and overseeing SI/PI, power estimation, and post-silicon co-relation in over 60+ SOCs. Specialized in auto-grade silicon creation for extreme conditions, successfully developing 6 auto-grade SOCs. Led corporate-level task-forces/work-groups, collaborating with senior technical leaders to accomplish complex cross-domain activities and strategic initiatives. Served as task force chair, focusing on next-generation disaggregation technology, power delivery, power-performance optimization, and tool-flow-methodology development. Drove the development and implementation of tool flow methodologies utilizing industry-standard tools from Synopsys, Ansys, Cadence, and Mentor Graphics (Siemens) for high-quality tape-in/tape-out. Proven track record in leadership, managing direct reports and virtual teams. Passionate about developing teams from scratch, improving sustainable efficiency, fostering next-generation technical leaders, and promoting innovation. Instrumental in driving the innovation agenda for a business group of 2000+ engineers across multiple global locations. Mentor in Intel India's flagship Startup Program, providing guidance to deep technology startups. Recognized with prestigious awards for technology innovation, including the "Innovator of the Year" and "Spirit of Qualcomm" awards at Qualcomm, as well as the "Intel Achievement Award" for 3DIC/Foveros innovation at Intel.
Stackforce AI infers this person is a leader in semiconductor design and AI hardware development.
Location: Bengaluru, Karnataka, India
Experience: 23 yrs 1 mo
Skills
- High Performance Computing (hpc)
- System Architecture
- System On A Chip (soc)
- Physical Design
Career Highlights
- Led implementation of industry-first SOCs with 47 chiplets.
- Pioneered chiplet-based SOC design methodologies.
- Recognized with multiple awards for technology innovation.
Work Experience
Krutrim
Product Architect and Technologist (2 yrs 8 mos)
Intel Corporation
Senior Principal Engineer (3 yrs 2 mos)
Senior Principal Engineer (0 mo)
Senior Principal Engineer at Intel Corporation (6 yrs 5 mos)
Qualcomm
Director Technology ( Principal Engineer) Qualcomm. (11 yrs 6 mos)
Sasken
Design Engineer (2 yrs 5 mos)
Education
Executive MBA at Indian Institute of Management Ahmedabad
Doctor of Philosophy - PhD at Calcutta University, Kolkata
Independent director at Indian Institute of Corporate Affairs
M.Tech at University of Calcutta
Effective Leadership & Management at Michigan State University
Drop Out at Indian Institute of Technology, Kharagpur