Madhur Sarin

Software Engineer

Delhi, India13 yrs 5 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in Processor based designing and FPGA technology.
Presented research at MIETC conference on FLEXRAY.
Strong background in ASIC design and verification.

Stackforce AI infers this person is a highly skilled ASIC and FPGA design engineer with expertise in embedded systems.

Contact

Skills

Other Skills

CC++CMOSDebuggingDigital ElectronicsElectronic Circuit DesignEmbedded SystemsFPGALinuxModelSimRTL DesignVHDLVLSIVerilog

About

Currently working as a Staff Design Engineer @Xilinx. Former Experienced Member Of Consulting Staff with a demonstrated history of working in the computer software/hardware industry. Skilled in Processor based designing, Verilog, Emulation and Field-Programmable Gate Arrays (FPGA). Strong engineering professional with a Bachelor of Technology (BTech) focused in Electrical, Electronics and Communications Engineering from Motilal Nehru National Institute Of Technology.

Experience

Amd

2 roles

SMTS Silicon Design Engineer

Promoted

Jul 2025 – Present · 8 mos

MTS Silicon Design Engineer

Feb 2022 – Aug 2025 · 3 yrs 6 mos

ASIC Design Engineer

Xilinx

Staff Design Engineer

Apr 2021 – Feb 2022 · 10 mos · Delhi, India

ASIC Design Engineer

Mentor graphics

3 roles

Member of Consulting Staff

Jan 2021 – Apr 2021 · 3 mos

Lead Member Technical Staff

Promoted

May 2017 – Jan 2021 · 3 yrs 8 mos

Currently working on CHI (Coherent Host Interconnect - AMBA 5) IP Design from scratch.
Developed FLEXRAY VTL IP (Synthesizable Core + HVL) from scratch.
Presented a Paper on ”Novel Implementation of FLEXRAY Message Buffer” at MIETC conference.

Senior Member Of Technical Staff

Mar 2016 – May 2017 · 1 yr 2 mos

Joined the Veloce Transactors Library group as a Senior Member Technical Staff.
Responsible for designing synthesizable verification IPs for Veloce Emulation Platform.
Working on automotive protocols like LIN/CAN/Flexray.