Rishi Kashyap

DevOps Engineer

Georgetown, Penang, Malaysia19 yrs 2 mos experience

Highly Stable

Key Highlights

15 years of experience in SoC ASIC and programmable design.
Expertise in RTL, Lint, CDC, and STA methodologies.
Proven leadership in multi-functional team environments.

Stackforce AI infers this person is a seasoned professional in Electronics and Semiconductor design with a focus on FPGA and SoC technologies.

Contact

Skills

Core Skills

FpgaSoc

Other Skills

CC++CDCDDR/DDR2Embedded CEmbedded SystemsEngineeringFPGA firmware handlingFPGA prototypingField-Programmable Gate Arrays (FPGA)Full Chip integration involvementHigh Speed DigitalHigh speed Hardware designI2CLint

About

Logic Design professional with 15 Years of relevant experience in SoC ASIC and programmable design, experience into Architecture, Micro architecture and design implementation role. Proven record of leading & working with multi-functional teams across geos. Skilled in RTL, Lint, CDC, STA, UPF, Authored Micro Arch MAS and involved in HAS bring-up, subsystem and full chip integration experience. DV authored, design checklist closure sign-off.

Experience

Altera

IP Logic Design

Sep 2025 – Present · 6 mos · Penang, Malaysia · On-site

Intel corporation

SoC Logic Design Engineer

Sep 2021 – Oct 2025 · 4 yrs 1 mo · Penang, Malaysia · Hybrid

SoC Design Engineer / FPGA silicon design engineer with Intel Microelectronics , Penang Malaysia with total 15 Years of experience in various domains SoC design and programmable device design

Colorjetindia ltd.

FPGA / SoC designing

Jul 2012 – Aug 2021 · 9 yrs 1 mo

RTL coding using VHDL, Xilinx FPGA based design, digital hardware design, SoC based platform , High speed Hardware design in R&D Department, independently handling FPGA firmware using VHDL and hardware bring up.

RTL coding using VHDLXilinx FPGA based designdigital hardware designSoC based platformHigh speed Hardware designFPGA firmware handling+2