Viswanath Bharadwaj — Software Engineer
8+ years of experience in multi-functional teams across SoC involving verification of AMD's x86 based Server SOCs (#Ryzen, #EPYC, #Rome, #Milan, #Milan-X, #Zen, #Zen2, #Zen3, #Zen4, #Zen5). Highly passionate individual with excellent work ethic, laudable communication skills and a great team player. - Good understanding of design and experienced at formulating test-plan strategies identifying all the possible corner cases scenarios involving, multiple-system level end-to-end scenarios. - Experienced in creating coverage plans specific to a design, generating functional and code coverage reports & analyzing them. - Well experienced in planning SoC verification activities, pro-actively assessing the dependencies from IPs, and other functional teams and planning ahead to beat the schedule. - Initially worked extensively on the Design for Debug(DFD) logic functional verification. Highly familiar with the debug bus working, debug data tracing to DRAM and Core debug functionality. - Well versed in enabling debug-functionality of different IPs at SoC to tap the debug data as desired, using JTAG/JTAG-SMN bridge etc. - Conceived various debug recipes for Post-Silicon debugs to isolate the issues seen. - Briefly worked on Post-Silicon debug of the AMDs x86 core, using remote debug tools. - Worked on AMD's infinity fabric low-power verification in the SoC Power Management team. - Worked on CPU low-power states as well as System level low-power states, involving low-power entry of multiple IPs at SoC as well as their power-state operations (involving frequency changes). - Worked extensively in configuring low-power entry mechanisms at SOC involving PCS+PHY's. - Currently working on validation bootcode functionality, Boot Sequence at SoC. - Verified multiple flavors of the bootcode's viz; Multi-Chiplet, Multi-Socket in Server SoC's, on SoC level configurations. - Co-ordinated with multiple involved parties ranging from bootcode-developers to Platform emulation engineers to ensure reliable bootcode, as per the laid-out specifications.
Stackforce AI infers this person is a Semiconductor Verification Engineer with extensive experience in SoC and debugging.
Location: Hyderabad, Telangana, India
Experience: 13 yrs 6 mos
Skills
- Verification
- Debugging
- Soc
Career Highlights
- 8+ years in SoC verification for AMD
- Expert in low-power state verification
- Strong debugging skills in x86 architecture
Work Experience
AMD
Member of Technical Staff (2 yrs 9 mos)
Design Engineer 2 (5 yrs 8 mos)
Senior Design Engineering (5 yrs 8 mos)
Contractor (2 yrs 4 mos)
Contractor (7 mos)
Intel Corporation
Pre Si-Validation Engineer (11 mos)
Whizchip Design Technologies Pvt Ltd
Engineer- VLSI (3 yrs 3 mos)
Student Intern (11 mos)
Education
Master of Technology (MTech) at Manipal Institute of Technology
Bachelor of Technology (BTech) at Jawaharlal Nehru Technological University, Hyderabad