Rajnish Garg

Software Engineer

Noida, Uttar Pradesh, India20 yrs 10 mos experience

Key Highlights

Expert in ASIC and CMOS technology development
Proficient in EDA tools and Verilog programming
Strong background in circuit design and debugging

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and CMOS technologies.

Contact

Skills

Core Skills

AsicCmos

Other Skills

Circuit DesignDebuggingEDAPerlSemiconductorsTCLVerilog

Experience

20 yrs 10 mos

Total Experience

20 yrs 10 mos

Average Tenure

20 yrs 10 mos

Current Experience

Stmicroelectronics

Senior Design Engineer - STD cell Library

Jul 2005 – Present · 20 yrs 10 mos

To develop and support ASIC standard Cell Libraries for various CMOS technologies

ASICCMOSEDAVerilogSemiconductorsCircuit Design+3

Education

Punjab Engineering College

Jan 2001 – Jan 2005

Stackforce found 100+ more professionals with Asic & Cmos

Explore similar profiles based on matching skills and experience

Richa Garg

Principal Engineer

at Marvell Technology

Bengaluru, India18 yrs 2 mos exp

Functional VerificationSoC

Mirza M Baig

Sr Manager Silicon Design Engineering

at AMD

Hyderabad, India19 yrs 9 mos exp

Rakesh Siddhartha Nagineni

Power Performance Area Design Engineer

at Intel Corporation

Hyderabad, India10 yrs 2 mos exp

Static Timing AnalysisLow-power DesignEDAPhysical Design

Ramesh Halli

Senior Department Manager

at MediaTek

Bengaluru, India21 yrs 3 mos exp

Prasanth Nandakumar

Director, Foundry

at Samsung Semiconductor India R&D

Bengaluru, India25 yrs 5 mos exp

Physical DesignVLSI

ALOK TRIPATHI

Senior Principal Engineer

at NXP Semiconductors

Noida, India25 yrs exp

Digital Circuit DesignPeople Management

Bhimender Saini

Associate Vice President

at Quest Global

Bengaluru, India27 yrs 2 mos exp

Engineering Leadership

Pratik Desai

Physical Design Engineer

at MediaTek

Bengaluru, India1 yr 5 mos exp

Physical DesignVLSI Design