Rakesh Siddhartha Nagineni — Software Engineer

● Good working knowledge of Linux, shell scripting ● Worked on Multi Power Domains, Multi Voltage Domains and good understanding of UPF ● Well knowledged about all the Low Power strategies and their implementations ● Hands-on experience of each phase of RTL-GDSII flow ● Worked on Sub-System implementation and timing closure with processor units integration ● Efficient in placing the high count macros ● Good knowledge in building Clock Tree and understanding of sensible clocking requirements ● Implemented functional and timing eco's ● Well-Knowledged in Static timing analysis and resolving timing issues of various paths ● Worked on highly utilized and congested partitions ● Industry experience involved working on lower technology nodes like 16nm, 14nm, 7nm, 5nm, 3nm (TSMC and Intel) ● Supported multiple partitions during IC Tape outs ● Basic knowledge of IC fabrication process ● Exposed to industry standard EDA tools like ICC, ICC2, Prime time from Synopsys and Innovus from Cadence

Stackforce AI infers this person is a VLSI Design Engineer with expertise in Physical Design and Low-power strategies.

Location: Hyderabad, Telangana, India

Experience: 10 yrs 1 mo