N

Nikhil Khandelwal

CEO

Noida, Uttar Pradesh, India15 yrs 6 mos experience
Highly Stable

Key Highlights

  • Expert in ASIC and Physical Design methodologies.
  • Proven leadership in engineering roles at top semiconductor companies.
  • Strong background in timing analysis and closure techniques.
Stackforce AI infers this person is a semiconductor design expert with a focus on ASIC and Physical Design.

Contact

Skills

Core Skills

Physical DesignAsic

Other Skills

Clock Tree SynthesisDRCEDALVSLogic SynthesisPhysical SynthesisSoCStatic Timing AnalysisTCLTiming ClosureVerilog

Experience

Arm

Principal Engineer

Mar 2025Present · 1 yr · Noida, Uttar Pradesh, India · On-site

VerilogPhysical DesignLogic SynthesisStatic Timing AnalysisTiming ClosureLVS+7

Qualcomm

3 roles

Sr Staff Engineer/Manager

Nov 2022Mar 2025 · 2 yrs 4 mos

Staff Engineer/Manager

Promoted

Dec 2019Nov 2022 · 2 yrs 11 mos

Sr Lead Engineer

Feb 2017Dec 2019 · 2 yrs 10 mos

Freescale semiconductor

FSL Design Engineer II Lead

Apr 2012Jan 2017 · 4 yrs 9 mos · Noida Area, India

Wipro technologies

Physical Design Engineer

Sep 2010Apr 2012 · 1 yr 7 mos · Bangalore

Education

KIIT University

B.Tech — Electronics & Telecomm

Jan 2006Jan 2010

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