Ankit Naredi

CEO

Bengaluru, Karnataka, India9 yrs 8 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Over 8 years of experience in Analog Engineering.
Expert in developing production test solutions for biomedical devices.
Proficient in FPGA design and RTL implementation.

Stackforce AI infers this person is a skilled Analog Engineer with expertise in semiconductor testing and FPGA design.

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Skills

Core Skills

Analog EngineeringTest EngineeringFpga Design

Other Skills

Teradyne's ETS364ETS88VLCT tester platformsSpotfireMbayseDMMOscilloscopeSourcemeterAWGProbe cardProbe headQFN socket designsFPGARTL designMSRCR algorithm

About

Post Silicon Test Engineer with 8+ years of experience working on Automated Test Equipment (ATE) platforms to design Final Test solutions for Industry’s cutting-edge semiconductor products.

Experience

Texas instruments

2 roles

Test Engineering Manager

Promoted

May 2024 – Present · 1 yr 10 mos

Analog Engineer

Jul 2016 – Apr 2024 · 7 yrs 9 mos

Test Engineer in Medical and Imaging group of Texas Instruments, working on production test solutions of Bio-medical Analog Front End devices.
Making of test plan, test hardware design, placement and layout reviews, test program development and debug, deployment of the test solution at various assembly and test sites.
Expertise of working on Teradyne's ETS364, ETS88, TI's in-house VLCT tester platforms.
Experienced in running complete Qualification, Reliability testing(HTOL, ESD, Latch-up etc.)
Owns end to end Final test solution, wafer probe solution for Bio-sensing and Bio-potential devices.
Expertise in engineering and production data analysis in Spotfire, Mbayse to understand yield fallout, Cpk analysis, setting specification limits.
Experienced in critical tests debug on both ATE and Bench test setup for tests like SNR, Scan, CMRR, PSRR etc.
Experienced in automation of various lab instruments like DMM, Oscilloscope, Sourcemeter, AWG etc. for using the same to generate Datasheet char plots on Bench test.
Expertise in Probe card, Probe head, QFN socket designs.
Involved in customer return debug, doing root cause analysis.
Work with design team, Bench test team and production sites to correlate ATE test data, yield monitor, Failure Analysis etc.

Teradyne's ETS364ETS88VLCT tester platformsSpotfireMbayseDMM+8

Logic fruit technologies

Project Intern

Jan 2015 – Mar 2016 · 1 yr 2 mos · Gurugram, Haryana, India

Implemented FPGA based RTL design for Multi Scale Retinex with Color Restoration(MSRCR) algorithm for image contrast enhancement. PAL video as input was tested and got satisfactory results for the same.

FPGARTL designMSRCR algorithmFPGA Design