Aug 2016 – Jul 2025 · 8 yrs 11 mos · India · On-site

• As a CTO, I have two distinct roles to play.
• 1). Lead - Process and Project Integration team & 2). Business Development, outreach & training, interfacing Strategic sectors and all external customers to National Nanofabrication facility.
• 1). Lead - Process & Project integration.
• CeNSE, has a state-of-the art nano fabrication facility that caters to national customer base that includes Academics and strategic sector laboratories.
• My role and contribution:
• I have built an integration team in 2013 that is now capable of handling about 100 different projects on an average per year that have a broad application ranging from MEMS, NEMS to optical devices.
• Guiding technologists through entire process - in understanding customer requirement, defining and fine-tuning process flows and execution.
• 2). Business Development, outreach and training.
• My role as a Business Development person is to reach out to various strategic sector laboratories (DRDO, ISRO & DAE) & universities, introduce the nano fabrication facility, educate and encourage scientists to use our facility to realize their goals.
• Achievements
• Secured several long-term projects from DRDO. ISRO and BARC bringing in revenue for establishment.
• Conducted technical discussions with scientists to understand their requirements and translated them into executable projects with defined deliverables leading to revenue for the facility.
• Initiated and conducted periodic workshops for academics and strategic sector scientists to facilitate deeper interactions with faculty and subject matter experts leading to fruitful project proposals and continuing engagement.
• Training:
• Co-ordinate annual conference " Micro and Nano Fabrication & Characterization Facility Management Symposium MNFACS" and Conference on Semiconductor Ecosystem in India, COSEIn.
• Lectures on Nanofabrication and advanced CMOS - for training Semiconductor industries including Lam Research, Applied Materials, Global Foundries and Tata Electronics

Jun 2009 – May 2014 · 4 yrs 11 mos · Bangalore, India

• National Nanofabrication Centre (NNfC), Centre for Nano Science and Engineering (CeNSE), Indian Institute of Science, Bangalore - India (2009 – 2014)
• NNfC is an Indian government-funded national MEMS, micro/nano fabrication facility open to all academic, defence and industrial users facilitating research, prototyping and training.
• Key responsibilities
• Process integration and development, in charge of etching (DRIE and ICP-RIE), deposition (PECVD, RF sputter tools, e-beam evaporation and ALD) and Photolithography bays (10 direct reports), technology consulting, managing technical staff, liaising between fabrication facility and industry, project evaluation, coordination and management (defence, industry and academic research), supervising research assistants and students, teaching and training.
• Key contributions
• Setting up multiuser MEMS and micro fabrication facility.
• o Significant contribution in developing a new cleanroom involving equipment layout, space allocation, hook-up and tool qualification.
• Built a motivated team of technologists and mentored them in process development and integration.
• Developed and maintained a web-based user interface (twiki page) enabling users to access resource for working inside the cleanroom.
• Designed and organised periodic national level training courses in micro and nano fabrication for large group of scientists and engineers.

Apr 2006 – Jul 2009 · 3 yrs 3 mos · Leuven, Flemish Region, Belgium · On-site

• Industrial assignee @ IMEC, Leuven, Belgium (2006 –2009).
• As an industrial partner from NXP semiconductors, worked in IMEC’s state of the art 300mm and 200mm cleanroom.
• Lab-on-Chip process integration
• Si sensors and detectors
• Design and Integration of GM-APDs in BiCMOS process
• Key contributions
• Invention disclosures, patents and conference publications.

Jan 2000 – Jan 2006 · 6 yrs · Brabantine City Row

• Si/SiGe based HBTs, process integration and characterization
• Integration of Si and III-V based nanowires in to main frame CMOS process.
• Key contributions
• SiGe HBT’s Emitter integration technology transfer from research to manufacturing.
• Invention disclosures, patents and conference publications.
• Successful demonstration of Dry etched and grown nanowire integration into mainframe CMOS process.