Ankit Singh — Product Engineer

3+ years of experience in ASIC Design Verification, specializing in PCIe Gen6 at the Transmitter side of the Transaction Layer. Strong expertise in SystemVerilog and UVM, with hands-on experience building robust and scalable verification environments. Block owner with proven ability to drive coverage >95%, ensuring complete functional verification (received formal recognition for ownership). Skilled in constrained-random and coverage-driven verification, enabling thorough exploration of corner cases and protocol scenarios. Experience in writing targeted test cases for corner cases, focused on achieving full functional coverage closure. Proficient in regression planning, execution, debugging, and triage, ensuring stable and high-quality nightly/weekly regressions. Experienced in capturing and maintaining verification requirements, ensuring all TB updates align with design changes and protocol revisions. Strong abilities in debugging, issue resolution, and release readiness, ensuring smooth and timely IP/sub-block deliveries. Effective collaborator with architects, designers, and DV teams to resolve issues and ensure verification completeness. Continuous learner with a strong focus on quality, ownership, and technical depth in verification methodologies.

Stackforce AI infers this person is a Semiconductor Verification Engineer with strong expertise in ASIC design and verification methodologies.

Location: Gorakhpur, Uttar Pradesh, India

Experience: 3 yrs 8 mos