S

Sharankumar Israji

CTO

Bengaluru, Karnataka, India14 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Over 12 years of experience in design verification.
  • Expert in PCIe verification from Gen1 to Gen5.
  • Technical lead at Google with extensive industry experience.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in PCIe and IP verification.

Contact

LinkedIn

Skills

Core Skills

Pcie VerificationIp VerificationProtocol Verification

Other Skills

PCIe Gen4PCIe Gen5PCIe Gen3Verification of IPUVMPCI ExpressAMBA AXISystemVerilogVerilogCSoCC++Functional VerificationASICAXI

About

With 12+ years of experience in DV, Over 8 years dedicated to PCIe verification, My experience spans developing PCIe VIP from the ground up, as well as verifying complex PCIe IPs and subsystems (Gen1 to Gen5).

Experience

14 yrs 7 mos
Total Experience
2 yrs 5 mos
Average Tenure
2 yrs 8 mos
Current Experience

Google

Technical Lead

Sep 2023 – Present · 2 yrs 8 mos · Bengaluru, Karnataka, India · On-site

Qualcomm

2 roles

Staff Engineer

Nov 2022 – Sep 2023 · 10 mos

  • Worked on PCIe Gen4 and Gen5 used in Qualcomm's Laptop and Automotive chips.
PCIe Gen4PCIe Gen5PCIe Verification

Lead Engineer

Feb 2020 – Nov 2022 · 2 yrs 9 mos

Intel corporation

Senior Engineer

Sep 2015 – Jan 2020 · 4 yrs 4 mos

  • Worked on verification PCIe Gen3 for intel's baseband chip,
  • PCIe Gen4 and Gen5 subsystems, used in Intel's Xeon chips.
PCIe Gen3PCIe Gen4PCIe Gen5PCIe Verification

Nvidia

Design Verification Engineer

Dec 2014 – Aug 2015 · 8 mos · Greater Bengaluru Area

  • Worked on the Verification of Transfer engine and RF interface IPs used in Modem chip.

Cisco

Hardware Engineer

Aug 2012 – Nov 2014 · 2 yrs 3 mos · bangalore

  • Worked on verification of IP in Datacenter Switch.
  • Developed testbench from scratch using UVM.
Verification of IPUVMIP Verification

Cortina systems

Member of Technical Staff

Jul 2011 – Aug 2012 · 1 yr 1 mo · bangalore

  • Projects: PCI Express ,
  • AMBA AXI (1.0) verification
  • languages :SystemVerilog ,Verilog
PCI ExpressAMBA AXISystemVerilogVerilogProtocol Verification

Education

B. M. S. College of Engineering

bachelor of engineering — Electronics and communication

Jan 2008 – Jan 2011

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