Jul 2025 – Present · 10 mos · Hyderabad, Telangana, India

• Investor in Caspian Leap for Agricultural Fund (LEAF).
• 'Caspian LEAF will focus on high impact, close to farmer solutions that benefit small and marginal farmers' - read more here https://caspianequity.in/leaf-program-fund/

Jan 2025 – Present · 1 yr 4 mos

• Investor in very early stage startups focused on climate solutions and eco-friendly products.

Jul 2024 – Sep 2025 · 1 yr 2 mos

• Transferred from AMD San Jose to AMD Hyderabad in Mid 2024.
• Responsibilities include: Next gen product definition, product architecture definition, Power delivery network architecture for 2D and 3D ICs

Jul 2022 – Jun 2024 · 1 yr 11 mos

• Joined AMD as part of XLNX acquisition in Feb '22.
• Responsibilities include: Next gen product definition, product architecture definition, Power delivery network architecture for 2D and 3D ICs

Jun 2024 – Nov 2024 · 5 mos · Remote

• Blogging about climate change and sustainable practices in everyday life. Visit ecoyaan.com/blogs

Apr 2024 – May 2024 · 1 mo

• One month hybrid learning course about regenerative farming and soil health. Spent a week at a ranch in California, learning regenerative land management practices and doing hands-on soil tests.

Jan 2017 – Jun 2022 · 5 yrs 5 mos · San Francisco Bay Area

• Part of Xilinx Architecture team. Working on next generation FPGA architecture, focusing on defining a power delivery network, use-case power modeling and thermal/power hotspot handling for customer designs. I work closely with Silicon technology, design and product planning teams.
• In parallel, i also work on competitive analysis and CMOS scaling trends.

Jun 2016 – Jan 2017 · 7 mos · Brussels Area, Belgium

• BSIM modeling of III-V InGaAs NMOS devices using literature.

Aug 2013 – Jul 2015 · 1 yr 11 mos

• Part of Advanced Technology Group at Xilinx. Work includes:
• 1. 16nm/10nm Technology evaluation for Xilinx FPGAs.
• 2. Understanding scaling trends with the shift from planar to finfet transistors. Clearly identify Power/Perf/Area trends and work with Silicon technology and Design teams to meet silicon targets.
• 3. Single Event Upsets HW and SW development for future Xilinx Families.

Jun 2011 – Jul 2013 · 2 yrs 1 mo

• 1. SEU reduction techniques for next generation electronics using latest simulation tools for radiation effects modeling. Won the prestigious 'Ross Freeman Award for Innovation' in 2014 for this project, titled '20nm SEU (Single Event Upsets) Immunity Leadership'.
• 2. Worked on 16nm FinFET technology evaluation from PPA(Power/Perf/Area) perspective.
• Topics : Radiation hardening, semiconductor physics, layouts, sram cells, flip flops, error correction codes, FINFETs, Architecture, TCAD simulations etc.

Jul 2010 – Jun 2011 · 11 mos · Bangalore, India

• Worked on radiation hardened CMOS design for space applications. Included gaining in-depth knowledge of semiconductor physics to understand the effects of radiation on a circuit.
• Also did IBIS modeling and library characterization for logic gates.