Thejaswini Halethimmanahally, Ph.D.

Operations Associate

Austin, Texas, United States12 yrs 6 mos experience

Highly Stable

Key Highlights

Proven success in module development and advanced packaging engineering.
Achieved over $18M in annual savings through process improvements.
Expert in defect reduction and yield enhancement in manufacturing.

Stackforce AI infers this person is a Semiconductor and Materials Science expert with a strong focus on process integration and yield enhancement.

Contact

thejuhc@gmail.com LinkedIn

Skills

Core Skills

Process IntegrationProgram ManagementCost ReductionYield EnhancementProcess DevelopmentResearch

Other Skills

Product DevelopmentQuality ManagementProduction Process DevelopmentThin FilmsResearch SkillsSpectroscopyWafer level assemblyDesign of Experiments (DOE)Excursion preventionReliabilityMaterials EngineeringDielectric barrier dischargeCapacitively coupled plasmaNPI ManagementCross-functional Collaborations

About

Results-driven and accomplished professional with industry experience in technical program management and process integration. Proven success in module development, advanced packaging engineering, and automation and skilled at defect reduction, high-volume manufacturing, and data analysis. Adept at capacity planning, yield improvement, and quality assurance and proficient at technology transfers, semiconductors, and NPI. Innovative team leader and clear communicator who builds working partnerships with peers, clients, and stakeholders to achieve departmental and corporate goals.

Experience

12 yrs 6 mos

Total Experience

4 yrs

Average Tenure

4 mos

Current Experience

Infineon technologies

Manager, External-Wafer Manufacturing Operations

Dec 2025 – Present · 4 mos · Austin, Texas Metropolitan Area

Intel corporation

2 roles

Technical Program Manager/ Process integration lead, Advanced Packaging

Promoted

Jul 2022 – Nov 2025 · 3 yrs 4 mos

Led integration efforts for advanced packaging, enhancing process flows and minimizing inline defects.
Spearheaded RFC implementations, achieving annual savings of over $18M in factory costs.
Directed cross-functional teams to resolve excursions and improve yield across multiple factories.
Directed the Integrated Shared Learning Forum, fostering collaboration among VF managers to tackle systemic integration challenges.
Mentored and managed engineers in the team.

Product DevelopmentQuality ManagementProcess IntegrationProgram Management

PTD Senior Process and Yield Integration Engineer

Mar 2018 – Jul 2022 · 4 yrs 4 mos

Owned PECVD thin film deposition tools for SiN and SiO layers in front-end-of-line (FEOL) processes for multiple tech nodes.
Led global yield enhancement and cost-reduction projects, improving efficiency across Intel fabs.
Qualified FOK tools and trained engineers on upgrades and recipe development, fostering skill growth.
Collaborated with defect metrology and integration teams to resolve critical 10nm defect modes.

Production Process DevelopmentThin FilmsYield EnhancementProcess Development