Gourav Khandelwal

DevOps Engineer

Bengaluru, Karnataka, India1 yr 5 mos experience

Key Highlights

  • Experienced in SystemVerilog and Python for design verification.
  • Strong academic background from BITS Pilani.
  • Hands-on experience in analog and digital design.
Stackforce AI infers this person is a Design Verification Engineer with expertise in semiconductor and microelectronics.

Contact

LinkedIn

Skills

Core Skills

Systemverilog

Other Skills

Python (Programming Language)C (Programming Language)Universal Verification Methodology (UVM)Cadence VirtuosoVerilogMATLAB

Experience

1 yr 5 mos
Total Experience
1 yr 5 mos
Average Tenure
--
Current Experience

Qualcomm

Design Verification Engineer

Jan 2026 – Present · 3 mos · Bengaluru · On-site

SystemVerilogPython (Programming Language)

Birla institute of technology and science, pilani

2 roles

Teaching Assistant - Analog IC Design

Aug 2025 – Dec 2025 · 4 mos

Teaching Assistant - Digital Design

Jul 2024 – Aug 2025 · 1 yr 1 mo

Kota super thermal power plant

Internship Trainee

May 2022 – Jul 2022 · 2 mos · Kota, Rajasthan, India · On-site

Education

Birla Institute of Technology and Science, Pilani

M.E. — Microelectronics

Jul 2024 – Present

Rajasthan Technical University

Bachelor of Technology - BTech — Electronics and Communication Engineering

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