Shyam Narwade — CEO
Experience in SoC power optimization, HW and SW interaction, power saving techniques such as multi VT, clock gating, voltage gating, DVFS, SOC low power mode analysis, and validation. Experienced System Validation Engineer with a demonstrated history of working in validating Intel server processors and smart NIC debug architecture. JTAG, fuse controller, error handling mechanism, IOSF, and various hands-on platform debug tools . experienced with use of oscilloscope and logic analyzer and carries broad understanding of LDOs SMPS, DC-DC convertors ,PCIe , DDR , USB ,AXI, APB, and Core-sight debug architecture.
Stackforce AI infers this person is a Semiconductor Engineering expert with a focus on power optimization and validation.
Experience: 7 yrs 8 mos
Skills
- Soc Power Optimization
- Silicon Validation
- Debugging
- Soc
- Validation
Career Highlights
- Expert in SoC power optimization techniques.
- Proven track record in validating Intel server processors.
- Skilled in debugging complex architectures and systems.
Work Experience
AMD
Member of Technical Staff (7 mos)
Qualcomm
Senior Engineer (4 yrs 4 mos)
Intel Corporation
System Validation Engineer (2 yrs 9 mos)
Education
Master of Technology - MTech at Indian Institute of Technology, Kharagpur
