Saket Jalan

CEO

Bengaluru, Karnataka, India28 yrs 6 mos experience

Highly Stable

Key Highlights

Proven track record in delivering complex silicon devices.
Expert in leading teams through engineering challenges.
Extensive experience in the semiconductor industry.

Stackforce AI infers this person is a semiconductor industry leader with extensive experience in SoC and digital design.

Contact

Skills

Core Skills

Technical LeadershipSocLow-power DesignEngineeringArchitecture

Other Skills

Integrated Circuit DesignASICSemiconductorsStatic Timing AnalysisVerilogRTL designVLSIMixed SignalICVery-Large-Scale Integration (VLSI)CMOSApplication-Specific Integrated Circuits (ASIC)System on a Chip (SoC)Timing ClosureFunctional Verification

About

Extensive experience in the semiconductor industry with a track record of leading teams through various challenges to achieve 1st pass success in delivering complex silicon devices. Well versed with the complete development cycle of SoC starting from product architecture definition stage, through the various phases of RTL design, synthesis, physical design and timing closure. Excited to have opportunities to do more and more interesting, challenging and fulfilling work. Enjoy working on fast paced projects and am continuously striving to achieve execution excellence.

Experience

28 yrs 6 mos

Total Experience

5 yrs 6 mos

Average Tenure

9 mos

Current Experience

Mediatek

Senior Director

Jul 2025 – Present · 9 mos · Bengaluru, Karnataka, India · On-site

Qualcomm

Director

May 2023 – Aug 2025 · 2 yrs 3 mos · Bengaluru, Karnataka, India · On-site

Intel corporation

Director, Engineering Manager

Jul 2017 – May 2023 · 5 yrs 10 mos · Bengaluru Area, India

Come work on the cutting edge of technology and help shape the future.
Do you have a passion for Digital Design, SoC ???
We are Hiring for various experience levels.
Send me a note if the thought of working at Intel excites you.

Technical LeadershipArchitectureEngineeringSoC

Texas instruments

4 roles

Senior Engineering Manager

Feb 2015 – Jun 2017 · 2 yrs 4 mos

Leading the SoC development, the digital design development and FPGA validation of Auto Radar devices. This is a highly integrated device, featuring different ARM cores, DSP core, Signal Processing Chain and the various Safety & Self-Test modules along with the associated Analog.

Technical LeadershipArchitectureEngineeringSoC

Design Manager

Promoted

Aug 2012 – Jan 2015 · 2 yrs 5 mos

Leading the design of TI’s highly integrated, low power, Internet-Of-Things Wi-Fi device. Responsible for overall delivery of full digital design which integrates multiple ARM cortex cores along with the WLAN (MAC + PHY + RF).

Technical LeadershipArchitectureEngineeringLow-power Design

Senior Design Lead

Jan 2010 – Aug 2012 · 2 yrs 7 mos

Technical LeadershipArchitectureEngineering

Design Lead

Aug 2003 – Jan 2010 · 6 yrs 5 mos

Technical LeadershipArchitectureEngineering

Infineon technologies

Senior Design Engr.

Jan 2000 – Jan 2003 · 3 yrs · Santa Cruz, California

Worked on Hard Disk Drive Read Write Channel Devices.

ArchitectureEngineering

Stmicroelectronics, noida

Design Engineer

Jan 1997 – Jan 2000 · 3 yrs · Noida Area, India

Worked extensively on Digital Signal Processing circuits.
Developed Sigma Delta modulator, highly area efficient digital filters and decimation/upconversion didgital filter chains for sigma-delta ADC/DAC devices.

ArchitectureEngineering