Amitava Mitra — CEO

Tech lead in realm of STA, Physical design; Managing and leading big teams and handling critical design challenges focusing on innovations with ~20 yrs of exp. Multi-rail multi-mode Static timing analysis (STA), ASIC and SoC design; experience in Physical Design and timing closure. Custom IC design; datapath. IC design: synthesis, PnR, low power IC design for deep sub-micron technology; proficient in low power design; technical management and planning. Specialties: Timing Analysis, PnR.

Stackforce AI infers this person is a Semiconductor Design Expert with extensive experience in Static Timing Analysis and Physical Design.

Location: Bengaluru, Karnataka, India

Experience: 23 yrs 11 mos