Satish Lakkamraju

Software Engineer

Bengaluru, Karnataka, India11 yrs 5 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in physical design and low power techniques.
  • Hands-on experience with cutting-edge process technologies.
  • Proven track record in IoT project development.
Stackforce AI infers this person is a Physical Design Engineer with expertise in IoT and Embedded Systems.

Contact

Skills

Core Skills

Physical DesignStatic Timing AnalysisIotEmbedded Systems

Other Skills

SynthesisFloor PlanningPower PlanPlacementClock Tree SynthesisRoutingTiming ClosurePhysical VerificationArduinoRFZigbeeGSMGPRS3GEthernet

About

 Have in depth knowledge and Clear understanding over all aspects of physical design, various low power techniques and ultra-deep sub-micron technologies.  Hands on experience on Implementation of block level designs in cutting edge process technologies like 40nm.  Worked on all aspects of physical design including Synthesis, Floor Planning, Power Plan, Placement, Clock Tree Synthesis, Routing, Complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS, ANT), DFM and DFY.  Expertise in various physical implementation tools like Synopsys-IC Compiler, timing sign-off tools like PT-SI, and physical verification tools like Calibre.  Have a good knowledge on analog and digital design fundamentals.  Have a good knowledge on Languages like Verilog–HDL, C.  Hands on experience on scripting languages like Tcl, Perl.

Experience

11 yrs 5 mos
Total Experience
3 yrs 9 mos
Average Tenure
7 yrs 10 mos
Current Experience

Mediatek

Senior Engineer

Jun 2018Present · 7 yrs 10 mos · Bengaluru Area, India

  • Responsible for complete design planning and implementation that includes floor planning, block size exploration, power planning, placement, CTS, Routing and timing closure, complex analog IP integration, and Physical verification (DRC/LVS/DRC).
  • Understanding the complete Block level design flow, static timing analysis concepts that includes MCMM, CRPR etc., IR Drop, SI Analysis, Physical Verification (DRC, ERC, LVS, ANT), DFM and DFY etc.
  • Effectively used DFA feature of IC compiler to make a good floor plan, which is optimal for
  • area, routing, CTS, and timing.
  • Resolved various issues related to IPs, which are caused to improper cts and built a ocv aware
  • clock tree with very good quality and less number of levels/buffer count.
SynthesisFloor PlanningPower PlanPlacementClock Tree SynthesisRouting+4

Self-employed

Freelancer/Hobbyist

Nov 2015Jul 2017 · 1 yr 8 mos · Hyderābād Area, India

  • Understanding basics of Internet of Things (IoT), Arduino & Linkt Smart 7688 duo Platforms.
  • Understanding and Implementation of several node connectivity technologies like RF, Zigbee,
  • BLE etc. and Backend connectivity technologies like GSM/GPRS/3G/Ethernet etc.
  • Design and Implementation of working prototype for the below IoT Projects.
  • Smart Meeting Room Booking System
  • Smart Waste Management System
  • ZigBee & GPRS/GSM based Smart Irrigation Control system
IoTArduinoRFZigbeeGSMGPRS+3

Cmc ltd

Embedded Design Engineer

Nov 2013Oct 2015 · 1 yr 11 mos · Hyderabad Area, India

  • Handle responsibilities of writing Embedded C code and schematic design for high speed
  • mixed signal boards.
  • Understanding and implementation of several communication protocols like SPI, I2C,
  • I2S,UART etc.,
Embedded CSPII2CI2SUARTEmbedded Systems

Education

RV-VLSI

Advanced Diploma in ASIC Design - Physical Design

Jan 2017Jan 2017

Nimra Institute of Eng&Tecnology

Bachelor’s Degree — Electronics and Communications Engineering

Jan 2008Jan 2012

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